[APAC] Accelerating the Semiconductor Workflow

 

Thursday, June 24, 2021

10:00 AM – 11:00 AM

(GMT+08:00) Kuala Lumpur, Singapore

 

11:00 AM - 12:00 PM (GMT+09:00) Asia/Tokyo, Seoul Time

This Webinar will provide Japanese and Korean subtitles.

Please find here for Japanese & Korean.

 

Evolving standards, new measurement types, cost pressure, and shorter development times are just a few challenges that arise in semiconductor validation labs. As chip complexity increases, the pressure to accelerate innovation and time to market also increases. What if you could adopt a modernized approach in your validation labs that enables speed and flexibility and improves efficiency?

 

Join our free, one-hour webinar to explore validation best practices that can help keep up with device complexity, incorporate new measurement requirements, scale across product teams, and allow engineers to spend more time focused on evaluating a semiconductor device and less time building and maintaining custom measurement solutions.

 

This session will introduce NI's Standardized Measurement Framework, which is a great way to facilitate measurement IP reuse and improve efficiency across interactive and automated lab workflows.

 

You’ll walk away with an understanding of best practices

and challenges associated with: 

 

  • Balancing custom and COTS solutions

  • Choosing if/when to use abstraction layers

  • Reusing measurement IP

  • Enabling zero-code measurement workflows for design and validation engineers

  • Future-proofing lab measurement systems

  • Accelerating the semiconductor design process